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  30712hkim 20120119-s00007 no.a2006-1/17 ver.1.00 specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appli ances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliab ility and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. LC877G16A overview the LC877G16A is an 8-bit microcontroller that, centered around a cpu running at a minimum bus cycle time of 200ns, integrates on a single chip a number of hardware f eatures such as 16k-byte rom, 512-byte ram, an lcd controller/driver, a sophisticated 16-bit timer/counter (may be di vided into 8-bit timers), two 8- bit timers with a prescaler, a 16-bit timer with a prescaler (may be di vided into 8-bit timers), a uart interface (full duplex), infrared remote control receive function, and gene ral-purpose i/o circuits. features ? rom ? 16384 8 bits ? ram ? 512 9 bits ? minimum bus cycle time ? 200ns (5mhz) v dd =2.7 to 5.5v note: the bus cycle time here refers to rom read speed. ? minimum instruction cycle time (tcyc) ? 600ns (5mhz) v dd =2.7 to 5.5v ? operating temperature range ? -40 c to +85 c ordering number : ena2006 cmos ic 16k-byte rom and 512-byte ram 8-bit 1-chip microcontroller
LC877G16A no.a2006-2/17 ? ports ? normal withstand voltage i/o ports ports whose i/o direction can be designated in 1-bit units: 13 (2 for uart, 1 for remote control, and 10 for key-scan signal i/o) ? normal withstand voltage input port 1 (xt1) ? lcd ports segment output: 74 (s00 to s73) common output: 4 (com0 to com3) bias power supply for lcd driving: 3 (v1 to v3) multiplexed pin functions input/output ports: 8 (p1n) ? dedicated oscillator ports 2 (cf1, cf2) ? reset pin 1 (res ) ? power pins 2 (v dd 1, v ss 1) ? lcd controller (1) display duty: 1/3duty, 1/4duty (2) display bias: 1/2bias, 1/3bias ? uart ? full duplex ? 7/8/9 bits data bit selectable ? 1 stop bit (2-bit in continuous data transmission) ? built-in baudrate generator ? maximum transfer rate: 200kbps (5mhz) ? timers ? timer 0: 16-bit timer/counter with a capture register mode 0: 8-bit timer with an 8-bit programmab le prescaler (with an 8-bit capture register) 2 channels mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) + 8-bit counter (with an 8-bit capture registers) mode 2: 16-bit timer with an 8-bit programma ble prescaler (with a 16-bit capture register) mode 3: 16-bit counter (with a 16-bit capture register) ? timer 4: 8-bit timer with a 6-bit prescaler ? timer 5: 8-bit timer with a 6-bit prescaler ? timer 8: 16-bit timer mode 0: 8-bit timer with an 8-bit prescaler 2 channels mode 1: 16-bit timer with an 8-bit prescaler ? base timer 1) the clock can be selected from the system clock and timer 0 prescaler output. 2) an interrupt can be generated at five different time intervals.
LC877G16A no.a2006-3/17 ? infrared remote control receiver circuit 1 1) noise rejection function 2) supports receive formats with a guide-pulse of half-clock/clock/none. 3) determines an end of receive by de tecting a no-signal period (no carrier). (supports same receive format with a different bit length.) ? high-speed multiplication/division instructions ? 16 bits 8 bits (5 tcyc execution time) ? 24 bits 16 bits (12 tcyc execution time) ? 16 bits 8 bits (8 tcyc execution time) ? 24 bits 16 bits (12 tcyc execution time) ? interrupts ? 14 sources, 8 vectors 1) provides three levels (low (l), high (h), and highest (x)) of multiplex interrupt contro l. any interrupt request of the level equal to or lower than th e current interrupt is not accepted. 2) when interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level takes precedence over the other interrupts. for interrupts of the same level, an interrupt into the smallest vector address is given priority. no. vector address level interrupt source 1 00003h x or l int0 2 0000bh x or l int1 3 00013h h or l t0l/remote control receiver1 4 0001bh h or l int3/base timer 5 00023h h or l t0h 6 7 00033h h or l uart receive/t8l/t8h 8 0003bh h or l uart transmit 9 10 0004bh h or l port 0/t4/t5 ? priority levels: x > h > l ? when interrupts of the same level occur at the same time , an interrupt with the smallest vector address is given priority. ? subroutine stack levels ? up to 256 levels mum (stack is allocated in ram) ? oscillator circuits ? rc oscillator circuit (internal): for system clock ? cf oscillator circuit: for system clock, with internal rf, and external rd ? system clock divider function ? can run on low current. ? the minimum instruction cycle can be selected from among 600ns, 1.2 s, 2.4 s, 4.8 s, 9.6 s, 19.2 s, 38.4 s, and 76.8 s (at a main clock rate of 5mhz).
LC877G16A no.a2006-4/17 ? standby function ? halt mode: halt mode is used to minimize power dissipation of the ic. halts instruction execution while allowing the peripheral circuits to continue operation. (some serial transfer fu nctions are suspended.) 1) oscillators do not stop automatically. 2) released by a system reset or occurrence of an interrupt. ? hold mode: hold mode is used to minimize power dissipation of the ic. suspends instruction execution and operation of the peripheral circuits. 1) the cf and rc oscillators automatically stop operation. 2) there are three ways of releasing hold mode. (1) setting the reset pin to a low level (2) setting at least one of the int0, int1, and int3 pins to the specified level (3) establishing an interrupt source at port 0 ? package form ? qfp100 (14 14) ?lead-free and halogen-free product? ? development tools ? on-chip debugger: tcb87-type b + lc87d7g16a tcb87-type c (3-wire cable) + lc87d7g16a
LC877G16A no.a2006-5/17 package dimensions unit : mm (typ) 3274 pin assignment sanyo: qfp100 (14 14) ?lead-free and halogen-free product? sanyo : tqfp100(14x14) 100 125 26 50 51 75 76 14.0 (1.0) (1.0) 0.1 0.125 16.0 0.2 0.5 1.2max 0.5 14.0 16.0 s69 s70 s71 s72 s73 com0 com1 com2 com3 v3 v2 v1 p70/int0/t0lcp p71/int1/t0hcp p00 p01 p02 p03 p04 p05 p06 p07 rmin/p73/int3/t0in utx/p34 urx/p35 s43 s42 s41 s40 s39 s38 s37 s36 s35 s34 s33 s32 s31 s30 s29 s28 s27 s26 s25 s24 s23 s22 s21 s20 s19 res xt1 v ss 1 cf1 cf2 v dd 1 s0/p10 s1/p11 s2/p12 s3/p13 s4/p14 s5/p15 s6/p16 s7/p17 s8 s9 s10 s11 s12 s13 s14 s15 s16 s17 s18 s68 s67 s66 s65 s64 s63 s62 s61 s60 s59 s58 s57 s56 s55 s54 s53 s52 s51 s50 s49 s48 s47 s46 s45 s44 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 LC877G16A top view
LC877G16A no.a2006-6/17 pin no. name pin no. name 1 res 51 s44 2 xt1 52 s45 3 v ss 1 53 s46 4 cf1 54 s47 5 cf2 55 s48 6 v dd 1 56 s49 7 s0/p10 57 s50 8 s1/p11 58 s51 9 s2/p12 59 s52 10 s3/p13 60 s53 11 s4/p14 61 s54 12 s5/p15 62 s55 13 s6/p16 63 s56 14 s7/p17 64 s57 15 s8 65 s58 16 s9 66 s59 17 s10 67 s60 18 s11 68 s61 19 s12 69 s62 20 s13 70 s63 21 s14 71 s64 22 s15 72 s65 23 s16 73 s66 24 s17 74 s67 25 s18 75 s68 26 s19 76 s69 27 s20 77 s70 28 s21 78 s71 29 s22 79 s72 30 s23 80 s73 31 s24 81 com0 32 s25 82 com1 33 s26 83 com2 34 s27 84 com3 35 s28 85 v3 36 s29 86 v2 37 s30 87 v1 38 s31 88 p70/int0/t0lcp 39 s32 89 p71/int1/t0hcp 40 s33 90 po0 41 s34 91 p01 42 s35 92 p02 43 s36 93 p03 44 s37 94 p04 45 s38 95 p05 46 s39 96 p06 47 s40 97 p07 48 s41 98 rmin/p73/int3/t0in 49 s42 99 utx/p34 50 s43 100 urx/p35
LC877G16A no.a2006-7/17 system block diagram interrupt control standby control bus interface base timer int noise filter rom pc port 0 timer 0 port 1/segment port 7 lcd controller acc b register c register psw rar ram stack pointer alu cf rc reset control clock generator remote control receiver circuit timer 4 timer 5 timer 8 port 3/uart res
LC877G16A no.a2006-8/17 pin description pin name i/o function option v ss 1 - - power supply no v dd 1 - + power supply no port 0 p00 to p07 i/o ? 8-bit i/o port ? i/o can be specified in 1-bit units. ? pull-up resistors can be turned on and off in 1-bit units. ? hold release input ? port 0 interrupt input yes port 3 p34, p35 i/o ? 2-bit i/o port ? i/o can be specified in 1-bit units. ? pull-up resistors can be turned on and off in 1-bit units. ? multiplexed pin function utx: uart transmit data output urx: uart receive data input yes xt1 i ? test pin ? 1-bit input port no ? 3-bit i/o port ? i/o can be specified in 1-bit units. ? pull-up resistors can be turned on and off in 1-bit units. ? multiplexed pin function p70: int0 input/hold release input/timer 0l capture input/watchdog timer output p71: int1 input/hold release input/timer 0h capture input p73: int3 input (with noise filter input/timer 0 event input/timer 0h capture input/infrared remote control receive input interrupt acknowledge type rising falling rising & falling h level l level int0 int1 int3 enable enable enable enable enable enable disable disable enable enable enable disable enable enable disable port 7 p70, p71, p73 i/o no s0/p10 to s7/p17 i/o ? lcd display segment output ? can be used as a general-purpose i/o port (p1). no s8 to s73 o ? lcd segment output no com0 to com3 o ? lcd common output no v1 to v3 i/o ? lcd bias no res i ? reset pin no cf1 i ? ceramic resonator input pin no cf2 o ? ceramic resonator output pin no port output types the table below lists the types of port outputs and the presence/absence of a pull-up resistor. data can be read into any input port even if it is in the output mode. port name option selected in units of option type output type pull-up resistor 1 cmos programmable p00 to p07 1 bit 2 n-channel open drain programmable 1 cmos programmable p34 to p35 1 bit 2 n-channel open drain programmable p70 - no n-channel open drain programmable p71, p73 - no cmos programmable s0/p10 to s7/p17 - no cmos programmable s8 to s73 - no dedicated lcd output no com0 to com3 - no dedicated lcd output no v1 to v3 - no dedicated lcd input no xt1 - no input only no
LC877G16A no.a2006-9/17 absolute maximum ratings at ta = 25c, v ss 1 = 0v specification parameter symbol pin/remarks conditions v dd [v] min typ max unit maximum supply voltage v dd max v dd 1 -0.3 +6.5 lcd supply voltage vlcd v1, v2, v3 -0.3 v dd input voltage v i (1) xt1, cf1, res -0.3 v dd +0.3 input/output voltage v io (1) ports 0, 1, 3, 7 -0.3 v dd +0.3 v ioph(1) ports 0, 34, 35 ? cmos output selected ? each pin used -10 ioph(2) ports 71, 73 ? each pin used -5 peak output current ioph(3) port 1 ? each pin used -5 iomh(1) ports 0, 34, 35 ? cmos output selected ? each pin used -7.5 iomh(2) ports 71, 73 ? each pin used -3 mean output current (note 1-1) iomh(3) port 1 ? each pin used -3 high level output current total output current ioah(1) ports 0,1,34, 35, 7 total of all pins -45 iopl(1) ports 0, 34, 35 ? each pin used 20 iopl(2) port 7 ? each pin used 10 peak output current iopl(3) port 1 ? each pin used 10 ioml(1) ports 0, 34, 35 ? each pin used 15 ioml(2) ports 7 ? each pin used 7.5 mean output current (note 1-1) ioml(3) port 1 ? each pin used 7.5 low level output current total output current ioal(1) ports 0,1,34, 35, 7 total of all pins 80 ma allowable power dissipation pd max tqfp100(14 14) ta=-40 to +85c 231 mw operating ambient temperature topr -40 +85 storage ambient temperature tstg -55 +125 c note 1-1: the mean output current is a mean value measured over 100ms.
LC877G16A no.a2006-10/17 allowable operating conditions at ta = -40c to +85c, v ss 1 = 0v specification parameter symbol pin/remarks conditions v dd [v] min typ max unit operating supply voltage range (note 2-1) v dd (1) v dd 1 0.588 s tcyc 30 s 2.7 5.5 memory retention supply voltage vhd v dd 1 keep ram and register data in hold mode. 2.0 5.5 v ih (1) ports 0, 1, 3, 7 ? output disabled ? when int1vtsl=0 (p71 only) 2.7 to 5.5 0.3v dd +0.7 v dd v ih (2) p71 interrupt side ? output disabled ? when int1vtsl=1 2.7 to 5.5 0.85v dd v dd high level input voltage v ih (3) xt1, cf1, res 2.7 to 5.5 0.75v dd v dd 4.0 to 5.5 v ss 0.15v dd +0.4 v il (1) ports 0, 1 output disabled 2.7 to 4.0 v ss 0.2v dd 4.0 to 5.5 v ss 0.1v dd +0.4 v il (2) ports 34, 35, 7 ? output disabled ? when int1vtsl=0 (p71 only) 2.7 to 4.0 v ss 0.2v dd v il (3) p71 interrupt side ? output disabled ? when int1vtsl=1 2.7 to 5.5 v ss 0.45v dd v il (4) xt1 2.7 to 5.5 v ss 0.2v dd low level input voltage v il (5) cf1, res 2.7 to 5.5 v ss 0.25v dd v instruction cycle time (note 2-2) tcyc 2.7 to 5.5 0.588 30 s ? cf2 pin open ? system clock frequency division ration=1/1 ? external system clock duty=50 5% 2.7 to 5.5 0.1 5 external system clock frequency fexcf(1) cf1 ? cf2 pin open ? system clock frequency division ratio = 1/2 2.7 to 5.5 0.2 10 fmcf (1) cf1, cf2 5mhz ceramic resonator oscillation see fig. 1. 2.7 to 5.5 5 oscillation frequency range (note 2-3) fmrc internal rc oscillation 2.7 to 5.5 0.3 1.0 2.0 mhz note 2-1: v dd must be held greater than or equal to 3.0v in the flash rom onboard programming mode. note 2-2: relationship between tcyc and oscillation frequency is 3/fmcf at a division ratio of 1/1 and 6/fmcf at a division ratio of 1/2. note 2-3: see tables 1 and 2 for the oscillation constants.
LC877G16A no.a2006-11/17 electrical characteristics at ta = -40c to +85c, v ss 1 = 0v specification parameter symbol pin/remarks conditions v dd [v] min typ max unit i ih (1) ports 0, 1, 3, 7 ? output disabled ? pull-up resistor off ? v in =v dd (including output tr off-leakage current) 2.7 to 5.5 1 i ih (2) res v in =v dd 2.7 to 5.5 1 i ih (3) xt1 ? input port specification ? v in =v dd 2.7 to 5.5 1 high level input current i ih (4) cf1 v in =v dd 2.7 to 5.5 15 i il (1) ports 0, 1, 3, 7 ? output disabled ? pull-up resistor off ? v in =v ss (including output tr off-leakage current) 2.2 to 5.5 -1 i il (2) res v in =v ss 2.2 to 5.5 -1 i il (3) xt1 ? input port specification ? v in =v ss 2.2 to 5.5 -1 low level input current i il (4) cf1 v in =v ss 2.2 to 5.5 -15 a v oh (1) i oh =-1ma 4.5 to 5.5 v dd -1 v oh (2) i oh =-0.4ma 3.0 to 5.5 v dd -0.4 v oh (3) cmos output ports 0, 34, 35 i oh =-0.2ma 2.7 to 5.5 v dd -0.4 v oh (4) i oh =-0.4ma 3.0 to 5.5 v dd -0.4 v oh (5) ports 71 to 73 i oh =-0.2ma 2.7 to 5.5 v dd -0.4 v oh (6) i oh =-0.4ma 3.0 to 5.5 v dd -0.4 high level output voltage v oh (7) port 1 i oh =-0.2ma 2.7 to 5.5 v dd -0.4 v ol (1) i ol =10ma 4.5 to 5.5 1.5 v ol (2) i ol =1.6ma 3.0 to 5.5 0.4 v ol (3) ports 0, 1, 34, 35 i ol =1ma 2.7 to 5.5 0.4 v ol (4) i ol =1.6ma 3.0 to 5.5 0.4 v ol (5) port 7 i ol =1ma 2.7 to 5.5 0.4 v ol (6) i ol =1.6ma 3.0 to 5.5 0.4 low level output voltage v ol (7) port 1 i ol =1ma 2.7 to 5.5 0.4 vodls s0 to s73 ? i o =0ma ? vlcd, 2/3vlcd 1/3vlcd level output ? see fig. 6. 2.7 to 5.5 0 0.2 lcd output voltage vodlc com0 to com3 ? i o =0ma ? vlcd, 2/3vlcd 1/2vlcd, 1/3vlcd level output ? see fig. 6. 2.7 to 5.5 0 0.2 v rlcd(1) resistance per one bias resistor see fig. 6. 2.7 to 5.5 60 lcd bias resistor rlcd(2) ? resistance per one bias resistor ? resistor division 1/2 mode see fig. 6. 2.7 to 5.5 30 rpu(1) 4.5 to 5.5 15 35 80 pull-up mos tr. resistor rpu(2) ? ports 0, 1, 3, 7 v oh =0.9v dd 2.7 to 4.5 18 50 150 k hysteresis voltage vhys(1) ? port 7 ? res 2.7 to 5.5 0.1v dd v pin capacitance cp all pins ? for pins other than that under test: v in =v ss ? f=1mhz ? ta=25c 2.7 to 5.5 10 pf
LC877G16A no.a2006-12/17 pulse input conditions at ta = -40c to +85c, v ss 1 = 0v specification parameter symbol pin/remarks conditions v dd [v] min typ max unit tpih(1) tpil(1) int0(p70), int1(p71) ? interrupt source flag can be set. ? event input for timer 0 is enabled. 2.7 to 5.5 1 tpih(2) tpil(2) int3(p73) (noise rejection ratio is 1/1.) ? interrupt source flag can be set. ? event input for timer 0 is enabled. 2.7 to 5.5 2 tpih(3) tpil(3) int3(p73) (noise rejection ratio is 1/32.) ? interrupt source flag can be set. ? event input for timer 0 is enabled. 2.7 to 5.5 64 tpih(4) tpil(4) int3(p73) (noise rejection ratio is 1/128.) ? interrupt source flag can be set. ? event input for timer 0 is enabled. 2.7 to 5.5 256 tcyc tpih(5) tpil(5) rmin(p73) recognized as a signal by infrared remote control receiver circuit 2.7 to 5.5 4 rmck (note4-1) high/low level pulse width tpil(5) res resetting is enabled. 2.7 to 5.5 200 s note 4-1: rmck denotes the reference frequency of th e remote control receiver circuit (40tcyc/50tcyc). consumption current characteristics at ta = -40c to +85c, v ss 1 = 0v specification parameter symbol pins/ remarks conditions v dd [v] min typ max unit iddop(1) 4.5 to 5.5 2.9 7.2 iddop(2) ? fmcf=5mhz ceramic resonator oscillation ? system clock set to cf 5mhz side ? internal rc oscillation stopped ? 1/1 frequency division ratio 2.7 to 3.6 1.6 3.9 iddop(3) 4.5 to 5.5 0.4 1.3 normal mode consumption current (note 5-1) iddop(4) ? fmcf=0hz (oscillation stopped) ? system clock set to internal rc oscillation ? 1/2 frequency division ratio 2.7 to 3.6 0.2 0.6 iddhalt(1) 4.5 to 5.5 1.1 3.2 iddhalt(2) halt mode ? fmcf=5mhz ceramic resonator oscillation ? system clock set to cf 5mhz side ? internal rc oscillation stopped ? 1/1 frequency division ratio 2.7 to 3.6 0.5 1.5 iddhalt(3) 4.5 to 5.5 0.3 0.8 halt mode consumption current (note 5-1) iddhalt(4) halt mode ? fmcf=0hz (oscillation stopped) ? system clock set to internal rc oscillation ? 1/2 frequency division ratio 2.7 to 3.6 0.2 0.3 ma iddhold(1) 4.5 to 5.5 0.14 14 hold mode consumption current iddhold(2) v dd 1 hold mode ? cf1=v dd or open (when using external clock) 2.7 to 3.6 0.03 10 a note 5-1: the consumption current value do not include current that flows into the output transistors and internal pull- up resistors.
LC877G16A no.a2006-13/17 uart (full duplex) operating conditions at ta = -40c to +85c, v ss 1 = 0v specification parameter symbol pin/remarks conditions v dd [v] min typ max unit transfer rate ubr utx(p34), urx(p35) 2.7 to 5.5 16/3 8192/3 tcyc data length: 7/8/9 bits (lsb first) stop bits: 1 bit (2-bit in continuous data transmission) parity bits: none example of 8-bit data transmission mode processing (transmit data=55h) example of 8-bit data reception m ode processing (r eceive data=55h) transmit data (lsb first) start of transmission end of transmission ubr start bit stop bit ubr receive data (lsb first) start of reception end of reception start bit stop bit
LC877G16A no.a2006-14/17 main system clock oscilla tor circuit characteristics given below are the characteristics of a sample main syst em clock oscillator circuit that are measured using a sanyo-designated oscillation characteristics evaluation board and external components with circuit constant values with which the oscillator vendor confirmed normal and stable oscillation. table 1 characteristics of a sample main system clock oscillator circuit with a ceramic resonator circuit parameters oscillation stabilization time frequency manufacturer resonator name c1 [pf] c2 [pf] rf1 [ ] rd1 [ ] operating voltage range[v] typ [ms] max [ms] notes cstcr5m00g53-r0 (15) (15) o pen 2.2k 2.7 to 5.5 0.05 0.15 5mhz murata cstls5m00g53-b0 (15) (15) open 2.2k 2.7 to 5.5 0.05 0.15 values shown in parentheses are capacitance included in the resonator the oscillation stabilization time is a period until the oscillation becomes stable after v dd becomes higher than minimum operating voltage. (see fig. 3) notes: since the circuit pattern affects the oscillation frequ ency, place the oscillation-relate d parts as close to the oscillation pins as possible with the shortest possible pattern length. figure 1 ceramic oscillator circuit figure 2 ac timing measurement point 0.5v dd c1 rd1 c2 cf cf2 cf1 rf1
LC877G16A no.a2006-15/17 reset time and oscillation stabilization time hold release signal and oscillation stabilization time figure 3 oscillation stabilization time internal rc oscillation cf1, cf2 operation mode hold release signal without hold release signal hold release signal valid tmscf hold halt power supply res internal rc oscillation cf1, cf2 operating mode reset time tmscf undefined reset instruction execution v dd v dd lower limit 0v
LC877G16A no.a2006-16/17 figure 4 reset circuit figure 5 pulse input timing signal waveform figure 6 lcd bias resistor tpil tpih n ote: select c res and r res value to assure that at least 200 s reset time is generated after the v dd becomes higher than the minimum operating voltage. c res v dd r res res vlcd sw: on (vlcd=v dd ) 2/3vlcd 1/2vlcd 1/3vlcd sw : on/off (programmable) v dd gnd rl c d rl c d rl c d rl c d rl c d rl c d rl c d rl c d rl c d rl c d
LC877G16A no.a2006-17/17 ps this catalog provides information as of january, 2012. specifications and information herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliab ility pr oducts, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these pr obab ilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd.


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